Radar System Architect

Destinus is redefining defense through cutting‑edge unmanned aerial vehicles that demand extreme speed, precision and cost efficiency. As a Radar System Architect you will help create the next generation of digital radar platforms where every gram, watt and millisecond counts, translating demanding aerospace missions into high‑performance sensing solutions. In this position you will build behavioural models of bistatic radar concepts, run system‑level simulations to forecast key metrics such as signal‑to‑noise ratio and resolution, and verify those models against real‑world measurements. You will author requirement documents, define specifications, and steer cross‑disciplinary studies that span hardware, software, signal processing and mechanical domains. Close collaboration with RF, digital, software and mechanical engineers is essential to select components that meet strict SWaP‑C targets. The role requires a solid grasp of transmitter and receiver architectures, including amplifiers, mixers, filters, clock circuits, PLLs and both A/D and D/A converters. You must be able to produce behavioural models of RF and analog blocks, preferably using Python, and possess a strong foundation in waveform design and digital communications. A thorough understanding of radar signal‑processing techniques is also mandatory. Experience with bistatic radar configurations and familiarity with FPGA technology are considered valuable additions. The team operates in a fast‑paced, mission‑critical environment and offers the chance to influence groundbreaking aerospace projects that serve government and defence partners worldwide. You will work alongside multidisciplinary experts who value clear communication, problem‑solving drive and a hands‑on approach to innovation. What the role asks for: - Deep knowledge of TX/RX architectures and building blocks - Behavioural RF/analog models preferably in Python - Waveform design and digital communication expertise - Strong radar signal‑processing understanding - Experience with bistatic radar (nice‑to‑have) - FPGA device knowledge (nice‑to‑have)