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Research Intern on Hardware Acceleration for Agentic-Era Server Workloads

Huawei·Dübendorf·23.09.2026

 careers.huaweirc.ch

 
 
internship80–100%
Job written in
English
Location
Dübendorf
Work type
On-site
Type
Internship

 

Huawei Technologies Switzerland AG is a leading technology firm focused on developing advanced computing architectures to support and enhance artificial intelligence systems. The company is dedicated to pushing technological boundaries and achieving excellence in research and development. The Research Intern on Hardware Acceleration for Agentic-Era Server Workloads will focus on understanding modern server workloads, including Data Analytics, Vector Databases, and Graph Neural Networks. The intern will read and analyze research papers from key conferences, collect traces using complex server benchmark suites, and profile and analyze bottlenecks. Additionally, the intern will propose hardware acceleration opportunities, model hardware-software interfaces, and investigate cross-domain hardware integration scenarios. To excel in this role, candidates must be enrolled in or have completed a Master's or PhD program in Computer Science or Engineering. Proficiency in C/C++, LLVM/MLIR, and knowledge of server CPU and SoC architecture are essential. Experience with computer architecture simulators such as gem5-accel, Aladdin, and Zsim is also required. Additionally, candidates should have a strong research acumen in analyzing bottlenecks and evaluating ideas with simulators. Nice-to-have skills include experience with trace collection and profiling tools, as well as the ability to perform experiments via emulation and simulation setups. The role offers opportunities to interact with a large pool of expert researchers and work on innovative projects that make a difference. What the role asks for: - Enrolled in or completed a Master's or PhD program in Computer Science or Engineering. - Knowledge of server workloads in the modern agentic era. - Proficiency in C/C++. - Proficiency in LLVM/MLIR. - Knowledge of server CPU and SoC architecture. - Experience with computer architecture simulators (gem5-accel, Aladdin, Zsim, Ramulator2, Booksim2, Cacti). - Knowledge of intermediate representations, compiler, code generation and backends (lli, mlir-opt). - Research acumen in analyzing bottlenecks, brainstorming solutions, and evaluating ideas with simulators.

 

 

 

 

 

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